Integrated circuit randomizers can be used to generate pseudo random numbers or random sequences of signals by using pseudo random number ("PRN") generators. In conjunction with PRN generators, linear feedback shift register ("LSFR") generators can also be used to increase the non-deterministic characteristics of the randomizer. The non-deterministic nature of an integrated circuit randomizer can be drastic. For example, assuming a LSFR circuit of 200 bits in length, theoretically the output data block pattern is not expected to repeat itself more than once in 2.sup.200 bits. This nature has lead the use of integrated circuit randomizers in several data encryption applications for secure data transfer and access.
To further enhance security, in many applications it is desirable to digitally generate a random number (or data block), which is then stored in a memory unit (e.g. non-volatile). Preferably, a single integrated circuit can contain the random number generator, the memory unit, and other system circuits as required.
Non-volatile memory components are commonly used in many integrated circuit applications, including systems in which an integrated circuit containing at least a part of the memory retains a unique identification number used for securing access to the system and/or its memory. On-chip generation (e.g. via a randomizer circuit) and storage of a highly non-deterministic (e.g., near random) data block permits integrated circuit manufacturers to encode a unique identification (e.g., a number) for each integrated circuit which can be used for securing authorized access to the integrated circuit and/or its incorporated memory. Within the integrated circuit, the unique identification is difficult to locate and comprehend. The above makes unauthorized use and access of the integrated circuit very difficult, as well as increases the difficulty in cloning the integrated circuit.
Within the above systems, persons seeking to access to the information stored in the memory or seeking to use the integrated circuit must first properly replicate the identification number. In a public-key encryption system, the pseudo random data block of digital bits that define the private deciphering key is maintained in secrecy to preserve the integrity of the system. One method of preserving secrecy of such keys is to generate the key through a randomizer circuit that uses a pseudo random process and then stores the key in the memory. A random seed (initialization vector) routine, that need not be kept secure due to its non-deterministic nature, produces a random bit stream in cryptographic applications.
FIG. 1 illustrates an exemplary layout 250 of a prior art randomizer circuit. There are different circuit stages of the randomizer circuit which are implemented using volatile memory blocks 262, 264, a standard cell layout area 270, and separated layout areas 252a-252c. The separated layout areas (e.g., hard layout areas) are allocated for custom designed analog oscillators that are used in different frequency legs of a random number generator circuit of the randomizer. Block to block routing resources 254a-254d are used to couple the outputs of the custom analog oscillators to the standard cell layout area 270 which contains the remainder of the digital logic portions of the randomizer.
Because the prior art oscillators are analog, and also because they are custom designed, the oscillators of the prior art randomizer layout 250 are not integrated within the standard cell layout area 270. This layout separation has a negative impact on the overall density of the integrated circuit because integration offers more ways to decrease overall design area and eliminates wasted space within and between the hard layouts 252a-252c. Further, the block to block routing resources 254a-254d consume area thus separation increases the overall layout size.
Further, because the prior art oscillators need to be separate from the standard cell layout area 250, they are relatively easy to locate and identify under an external intrusion. In this case, the oscillator block routing resources can be separated, once located, and thus violate the integrity of the random number generation process. For instance, the randomizer can be modified by cutting the oscillator outputs such that the generated number can be predicted (e.g., forced to zero, or some other value to circumvent a zero check that is predictable; the randomizer can be replaced by a counter).
Further yet, since the prior art oscillators are custom analog circuits, they are not readily portable between different fabrication and circuit technologies. In order to port a prior art custom analog oscillator circuit from one technology to another, the prior art oscillator needs to be completely redesigned and simulated, thus increasing design time. Also, even within the same technology, the prior art oscillators require extensive redesign to realize different frequencies. Prior art custom analog oscillators also tend to consume a relatively large amount of power.
Accordingly, what is needed is a randomizer circuit that efficiently utilizes layout area and that is readily ported between different fabrication and circuit technologies without a large of amount of custom redesigning. The present invention provides these advantageous features. What is needed is an oscillator circuit that can be implemented within the standard cell layout area of the randomizer circuit layout so that the oscillator is difficult to locate. What is needed yet is an oscillator design that can be readily re-characterized to implement different frequencies. The present invention provides such an advantageous oscillator circuit and design. These and other advantages of the present invention will become apparent within discussions of the present invention herein.